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嵌入式软件工程师招聘

放大字体  缩小字体 发布日期:2017-09-26  浏览次数:32851
 行业  IT|通信|电子|互联网  职位  电子技术/半导体/集成电路
 招聘部门    招聘人数  若干
 工作地区  四川成都市  工作性质  全职
 性别要求  不限  婚姻要求  不限
 学历要求  硕士  工作经验  不限
 年龄要求  不限年龄  待遇水平  面议
 更新日期  2024-11-23  有效期至  长期有效
职位描述
内部培训 五险一金 工作环境好 弹性工作制 年终多薪
仅限于2018年毕业的学生​
Job Description - Duties & Responsibilities:As part of Marvell central system validation team, the SV engineer will mainly focus on following areas, but not limited to:
-Validate different kinds of SoC, including function validation, performance validation and power consumption validation. And pre-silicon and post-silicon validation.
-Develop system level software to cover complex use cases of different kinds of SoC.
-Debug complex system level SoC issues which including software and hardware issues.
-Cover the temperature, voltage and process validation of the SoC.
-Support different product lines as central platform on compliance test.
-Support different kinds of SoC bring up and validate the bootrom.

Required Education, Knowledge, Skills & Abilities:
- Master’s degree in electrical engineering, computer engineering or related technical fields,
- Good knowledge of C, ARM architecture, embedded system software and device driver development.
- Knowledge and experience of software and hardware debugging.
- Knowledge of multi-core and multi-thread OS.
- A high-level of self-motivation and a proactive approach to solving problems.
- Good English communications skills.
- Knowledge of PCIE, SATA, USB,NAND and WIFI is plus.
- Experience of oscilloscope and logic analyzer is plus.
 

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公司介绍

仅限于2018年毕业的学生

Job Description – Duties and responsibilities:

In this position as a Signal Integrity Engineer, you will be responsible for definition, analysis and verification of the system interconnect for high speed digital systems of Embedded, PC and mobile chipsets. Your responsibilities will include but not be limited to:
- Interfacing with circuit design, applications engineering, packaging technology, and board design teams to define & implement system interconnect that meet internal specifications and customer requirements.
- Responsible for deliverables, which will include timing assessment, customer design guidelines, IBIS models, package bump/ballout specifications, and developing reference routing for package/board.
- Responsible for and involved in Signal integrity and Power Delivery simulations, signal integrity tools and lab debug/measurements

Qualifications:
You should possess a MS/Phd in Electrical Engineering with knowledge in one of the following areas:
- IO circuits (board, chip and transistor level), high speed digital design, PCB layout, and Package technology.
- Experience in using at least one of extractions/simulation tools such as HFSS/Q3D/Hspice is a must. Experience with lab equipment such as oscilloscopes, network analyzers is required.
- Experience in interfaces such as DDR, Nand, PCIe/USB/SATA or other high speed parallel/serial bus is a plus
 
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